ASIP38
This project includes an Application-Specific Instruction set Processor (ASIP) connected to a VGA graphics controller, which supports vector graphics. The whole system is completely custom designed and implemented in VHDL for an FPGA. Additionally, there are five assembly programs for demonstration of the system.
PROJECT VIDEO
IMPLEMENTATION
Here are VHDL files for the FPGA implementation.
Processor:
asip38.vhd
Graphics controller:
display_control.vhd
rgb_gen.vhd
vga_sync.vhd
line_draw.vhd
ellipse_draw.vhd
area_paint.vhd
font_rom40x15.vhd
font_rom80x60.vhd
ASSEMBLY SOFTWARE
The main program for the ASIP38:
asip38_assembly.txt
It is compiled to a binary file with a self-made assembler:
assembler.py
FEATURES
BLOCK DIAGRAMS
CONTACT
Lauri Isola <send email>